Two 4-bit sources share one bus through tri-state buffers. When en_a is 1 the bus carries data_a; when en_b is 1 it carries data_b; when neither is enabled the bus floats (high impedance, z on every bit). Use the z literal and conditional assigns, one per source, so the bus has two drivers. Inputs: data_a, data_b (4 bits each), en_a, en_b. Output: bus, 4 bits. The testbench applies every data pair under the three legal enable patterns (neither, only a, only b): 768 vectors. Both enabled at once is illegal and is not tested.