1:4 DeMultiplexer in Verilog | Indicore Challenge

IndiCore

Challenges
Courses
Playground
Leaderboard

Login

Confirm Logout

Are you sure you want to log out?

1:4 DeMultiplexer

Design a 1:4 DeMultiplexer circuit in Verilog.

Project

Files live in this tab only; nothing is saved.

Compiler Output

Waveform Viewer